In modern cellular wireless receivers the use of zero-IF or low-IF receiver architectures, such as the one shown in FIG. 1, have become very popular. This is due at least in part to the fact that in these architectures a very high level of integration can be obtained. As a consequence, a low material or component cost can be obtained. Moreover, typically in these receiver topologies, no (off-chip) image filter is required between the LNA 1 and the quadrature mixers 2 and 3, and the LNA 1 can thus drive the mixers 2 and 3 directly on chip. This results also in lower power consumption, because no power is wasted in buffering high-frequency signals off-chip. Moreover, the impedance level between the LNA 1 and the quadrature mixers 2 and 3 can be set and optimized freely, which is a clear advantage when considering the RF front-end performance optimization.
In mass product applications, the radio receiver must meet its dynamic range specifications under nominal conditions and also in the presence of supply voltage, temperature and integrated circuit process variations. Otherwise, the product yield is degraded. The lower and upper ends of the dynamic range are set by the noise and intermodulation characteristics of the radio receiver, respectively. In particular, the noise figure (NF) and input-referred third-order intercept point (IIP3) for the receiver presented in FIG. 1 are given as                     NF        =                              NF            1                    +                                                    NF                2                            -              1                                      G              a1                                +                                                    NF                3                            -              1                                                      G                a2                            ⁢                              G                a1                                              +          …                                    (        1        )                                          1          IIP3                ≈                              1                          IIP3              1                                +                                    G              a1                                      IIP3              2                                +                                                    G                a1                            ⁢                              G                a2                                                    IIP3              3                                +          …                                    (        2        )            respectively. Here NF1, IIP31 and Ga1 are the NF, IIP3 and the available power gain of the LNA 1, respectively. Correspondingly, NFn, IIP3n and Gan are the NF, IIP, and available power gain of an nth block. The effect of the duplex filter 4 that precedes the LNA 1 is neglected for simplicity.
Equations (1) and (2) reveal the reason why it is important to stabilize the gain of the LNA 1. For example, consider the case in which the gain of an unstabilized LNA 1 is for some reason less than in a nominal condition. Then, according to Eq. (1), the noise contributions of the following stages are suppressed less than in the nominal condition, and the entire receiver may fail to meet its sensitivity requirements. On the other hand, if the gain is too large in some process corner, IIP, given by Eq. (2) is degraded and the receiver may fail to meet its intermodulation specifications. Thus, in order to maximize the yield of the receiver IC, it is very important to stabilize the gain of the LNA 1.
Many of the reported wireless receivers use an inductively degenerated common-source (emitter) LNA architecture shown in FIG. 2. With this circuit topology, excellent input matching and low NF can be achieved simultaneously. At the resonance frequency                               f          0                =                  1                      2            ⁢            π            ⁢                                                            (                                                            L                      g                                        +                                          L                      s                                                        )                                ⁢                                  C                  gs                                                                                        (        3        )            the input impedance of the LNA 1 is purely real and can be approximated as                               Z                      i            ⁢                                                   ⁢            n                          =                              R                          i              ⁢                                                           ⁢              n                                =                                    r              g                        +                                                                                g                    m                                    ⁢                                      L                    s                                                                    C                  gs                                            .                                                          (        4        )            
In order to regulate the input device transconductance gm, and thus the LNA input impedance, the amplifier is biased using a constant-transconductance technique. In the typical case this is sufficient to stabilize the LNA input impedance (see Eq. (4)) adequately against process, supply and temperature variations, since the other terms in Eq. (4) vary less with the process than gm. For example, typically the source inductance Ls is integrated and therefore its performance depends mainly on the device geometry, which is considered to be relatively constant from one die sample to another. In a typical case the inductance of an integrated inductor varies only about ±1% between integrated circuit die samples.
At the operational frequency f0 the transconductance of the input stage is given as                               G          m                =                  1                                    ϖ              0                        ⁢                          L              s                                                          (        5        )            and then the LNA voltage gain at f0 is simply given as                                           A            v                    =                                                                                    Z                  L                                ⁡                                  (                                      ϖ                    0                                    )                                                                                                  ϖ                0                            ⁢                              L                s                                                    ,                            (        6        )            where |ZL({overscore (ω)}0)| is the load impedance of the LNA at f0.
It should be noticed that if the input impedance matching conditions (3)-(4) are met, the LNA transconductance, given by Eq. (5), is relatively constant at a given resonance frequency f0, since it depends only on Ls. For the same reason, the LNA voltage gain, given by Eq. (6), varies mainly with LNA load impedance at the given frequency f0.
In conclusion, in order to stabilize the voltage gain of the LNA 1 at the operational frequency, the load impedance at the operational frequency should be stabilized against variations. Moreover, it should be noticed that as the LNA load is usually implemented with passive components, it is sufficient to stabilize the variation of only the load impedance against process variations. In general, integrated passive components vary much less with temperature (and supply voltage) than with process. On the other hand, as the LNA 1 is biased with the constant-transconductance technique, the input impedance, and thus the gain of the amplifier, are also stabilized against temperature and supply variations.
Most of the LNAs known to the inventors use an LC-resonator load to peak the gain of the amplifier at the frequency of interest and to reject the out-of-band interfering signals. A typical parallel LC load used in narrow band tuned amplifiers is shown in FIG. 3a, where the illustrated components form the load ZL connected to the drain of M2, as shown in FIG. 2. Here C includes also the input capacitances of the following I and Q mixers 3 and 4, and any other parasitic capacitance presented at the output node of the LNA 1.
At the operational frequency f0, L and C are in parallel resonance                               f          0                =                  1                      2            ⁢            π            ⁢                                          L                ⁢                                                                   ⁢                C                                                                        (        7        )            and the load impedance of the LNA is purely real                                                                                     Z                L                            ⁡                              (                                  ϖ                  0                                )                                                          =                                    R              L                        ≈                                                                                (                                                                  ϖ                        0                                            ⁢                      L                                        )                                    2                                                  R                  ls                                            ⁢                                                                                    r                    oc                                    =                                      (                                          Q                      ⁢                                                                                           ⁢                                              ϖ                        0                                            ⁢                      L                                        )                                                                              ⁢                              r                oc                                                    ,                            (        8        )            where Rls is the series resistance of the load inductor L, roc is the output impedance of the cascode amplifier and Q is the quality (Q) factor of L. It is reasonable to assume that the Q of the entire resonator is determined by the Q-factor of the integrated inductor L.
As Q-factors of integrated differential inductors used in balanced LNAs are typically larger than 10, the Q of the resonator circuit shown in FIG. 3A is usually too high to be used as such in the LNA. Namely, if the Q of the resonator is high, the bandwidth of the resonator is narrow and the deviation of the integrated capacitor C will spread the load resonance frequency considerably. For the same reason, the magnitude of the LNA load impedance will also vary with C at the resonance frequency. In that the values of the integrated capacitors can deviate as much as ±20% from die sample to die sample, an additional integrated resistance Rp is often placed in parallel (shunt) with the load resonator, as shown in FIG. 3B. The shunt resistor lowers the Q of the LC-circuit and broadens the resonator bandwidth. As a result, the magnitude of the LNA load impedance at the operational frequency varies much less with variations of the parallel capacitance C.
As the shunt resistor Rp lowers the Q of the load resonator, it also lowers the magnitude of the LNA load impedance at the operational frequency:
 |ZL({overscore (ω)}0)|=(Q{overscore (ω)}0L)∥roc∥Rp≈Rp,   (9)
where it is assumed that in practice Rp<<roc and Rp<<(Q{overscore (ω)}0L). Although Rp lowers the magnitude of the LNA load impedance, it is typically still possible to realize LNA voltage gains on the order of 20-25 dB, which represent a gain that is sufficient for many applications of interest.
According to Eq. (9), the LNA load impedance at the resonance frequency is determined mainly with Rp. As Rp is realized as an integrated passive resistor, it can be expressed as Rp=nRsh where Rsh is the sheet or unit resistance of the resistance material (e.g. polysilicon) and n is the number of the sheet resistances needed to implement the desired resistance value. Moreover, as Rp is directly proportional to Rsh, the LNA load impedance and also the voltage gain will deviate exactly similarly as Rsh. For instance, with the typical tolerance of ±20% of integrated polysilicon resistors, the LNA voltage gain variation due to the resistor variation only is almost 20 log 1.2−20 log 0.8=3.5 dB. Therefore, an alternative method for tuning the Q-factor of an LC-parallel resonator needs to be employed in order to stabilize the LNA voltage gain variations. It should be noticed that as the Q-factor of a parallel resonator shown in FIG. 3B can be expressed as Q={overscore (ω)}0CRp, the value of Q varies exactly in the same manner as Rsh.
It can be appreciated that what is required is a technique to stabilize the load impedance and the gain of the LNA 1 at the operational frequency against variations in the values of the integrated capacitors as well as the integrated resistors. Prior to this invention, this requirement was not adequately met by the prior art.